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ISSN : 1225-0562(Print)
ISSN : 2287-7258(Online)
Korean Journal of Materials Research Vol.28 No.1 pp.38-42
DOI : https://doi.org/10.3740/MRSK.2018.28.1.38

Simulation Study of Front-Lit Versus Back-Lit Si Solar Cells

Kwang Su Choe†
Department of Electronic Materials Engineering, College of Engineering, The University of Suwon Hwaseong-Shi, Gyeonggi-Do 18323, Republic of Korea
Corresponding author : kschoe@suwon.ac.kr (K. S. Choe, Univ. of Suwon)
20170921 20171114 20171121


Continuous efforts are being made to improve the efficiency of Si solar cells, which is the prevailing technology at this time. As opposed to the standard front-lit solar cell design, the back-lit design suffers no shading loss because all the metal electrodes are placed on one side close to the pn junction, which is referred to as the front side, and the incoming light enters the denuded back side. In this study, a systematic comparison between the two designs was conducted by means of computer simulation. Medici, a two-dimensional semiconductor device simulation tool, was utilized for this purpose. The 0.6 μm wavelength, the peak value for the AM-1.5 illumination, was chosen for the incident photons, and the minority-carrier recombination lifetime (τ), a key indicator of the Si substrate quality, was the main variable in the simulation on a p-type 150 μm thick Si substrate. Qualitatively, minority-carrier recombination affected the short circuit current (Isc) but not the opencircuit voltage (Voc). The latter was most affected by series resistance associated with the electrode locations. Quantitatively, when τ ≥ 500 μs, the simulation yielded the solar cell power outputs of 20.7 mW·cm−2 and 18.6 mW·cm−2, respectively, for the front-lit and back-lit cells, a reasonable 10 % difference. However, when τ < 500 μs, the difference was 20 % or more, making the back-lit design less than competitive. We concluded that the back-lit design, despite its inherent benefits, is not suitable for a broad range of Si solar cells but may only be applicable in the high-end cells where float-zone (FZ) or magnetic Czochralski (MCZ) Si crystals of the highest quality are used as the substrate.


    University of Suwon

    © Materials Research Society of Korea. All rights reserved.

    This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.


    In the prevailing Si solar cell technology, the dominant design is front-lit where the incident lights or photons enter the surface close to the pn junction. Here, the base (substrate) is usually p-type, and on top of it a thin ntype emitter layer is formed by thermal diffusion. For external electrical connection, thin metallic grid lines (cathode) are deposited on the n-type emitter layer, and a full metallic layer, usually of Al, is deposited on the rear(anode). When the incident photons are reflected back off the cathode grid lines, a shading loss occurs. An alternative design that is gaining traction lately is back-lit or BCBJ(Back Contact and Back Junction) where both cathode and anode electrodes are deposited on the surface of the n-type emitter. This leaves a surface(formerly the backside in the case of front-lit) completely denuded to face the sun fully.

    For reasons related to the minority-carrier recombination, the substrate of Si solar cells is normally p-type as the minority carriers in it are electrons that diffuse faster than holes. The situation would be the opposite, had the substrate been n-type, and holes, the slower carriers, would be more prone to recombination due to their slower speed. An associated drawback with the ptype substrate is that the resistivity is proportionately higher, by virtue of having slower moving holes as the majority carriers, which means higher current and power losses in the substrate. Another drawback is light-induced degradation(LID) known to exist in the p-type Czochralski (CZ) silicon associated with boron-oxygen complexes.1)

    In regards to the photovoltaic operation, the front-lit design allows the electron-hole pairs form very near or on the pn junction, or the potential drop, enabling a rapid electrical current flow from the n-type to the p-type. The downside, as discussed above, is shading, i.e., a loss of light flux into the solar cell, by the front metallic cathode. The loss by shading may account for as much as 10 % of light influx. This translates to a 10 % loss in the output power of the solar cell, or a 2 % loss in the energy conversion efficiency in the standard 20 % efficient solar cell. In the back-lit design, the shading is absent as the side(formerly the backside of the front-lit cell) facing the sun is completely denuded of metallic electrodes. A downside is that the incident photons are absorbed mostly near the rear surface and generate electron-hole pairs very far away from the pn junction that is located at the opposite end. In this situation, the minority carriers, i.e., electrons if the substrate is p-type, may not all reach the pn junction as recombination with majority carriers became significant. As such, given a similar material quality, the back-lit design ordinarily yields less power output than the comparable front-lit design. Also, a drawback is that the emitter layer and the cathode need to be patterned to give rooms to the anode to contact the substrate.

    Despite the downside and the drawback mentioned, the back-lit design holds greater promise now as crystal growth methods and wafer fabrication technologies improve. That is, improvement in dislocation-free crystal growth methods results in better quality Si crystals, and improvement in wafer fabrication technologies results in ever thinner substrates. With better quality materials, the minority carriers have longer mean free lifetimes, i.e., less likely recombine with majority carriers, enabling them to travel longer distances to reach the pn junction and the respective electrodes. With thinner substrates, the distances to the pn junction and respective electrodes are proportionately shorter, enabling the minority carriers reach them faster. In common Si solar cell materials, the minority-carrier recombination lifetime ranges approximately from 1ms to 1ns: the longest lifetime belonging to float-zone(FZ) silicon, followed by CZ silicon and then polycrystalline silicon.

    In regards to energy conversion efficiencies, for frontlit Si solar cells, the highest efficiency reported to date for an actual cell is 24.7 % by a method known as PERL(Passivated Emitter, Rear Locally-diffused),2) while the more typical value accepted in laboratory-scale solar cells is about 20 %, or 20 mW·cm-2 under AM1.5.3) As for back-lit solar cells, the efficiency was somewhat lower, but has been fast approaching that of the front-lit solar cells and lately has pulled nearly even at as high as 21.5 % with FZ Si substrates,4) thanks to the improvements in material quality and wafer fabrication just mentioned above.

    As the bare Si wafer accounts for nearly 60 % of the cost of a solar cell module, the cost consideration encourages the switch from expensive FZ silicon to less expensive CZ silicon or to even less expensive polycrystalline silicon. Together with substrate thickness, the minority-carrier lifetime affects the energy conversion efficiency and ultimately the power output of the solar cell. The extent of its influence is one that needs to be studied comprehensively. In this work, computer simulations were conducted in lieu of laboratory experiments by using 2-dimensional semiconductor device simulation software called Medici. Despite the virtual nature of computer simulation, the results will shed light on carrier recombination and substrate issues as well as providing quantitative evidences on direct one-to-one comparison between the front-lit and back-lit Si solar cells.


    When an experiment is iterative, i.e. repeated many times, to the extent that the repetition is not practically possible, a mathematical modeling and simulation of the experiment is a viable alternative. In the present case of Si solar cells, where two distinct designs compete against each other as a function of a variable, i.e., minoritycarrier recombination lifetime, that is dependent on none other than the material itself, iterative computer simulation is a good option in short of performing actual physical experiments. Just as a real solar cell structure is fabricated in the laboratory, a graphic version of a solar cell can be made in the virtual space step by step, and an essential variable or variables can be tested and investigated in computer simulation.

    In the present study, Medici, a widely circulated semiconductor device simulation software tool, was utilized. Specifically, a 2-dimensional version was used. As in many simulations, the Medici simulation consists of four major steps. First, the solar cell structure is formed by a grid or mesh, sort of like building a modeled house using match sticks. The regions near the front and back surfaces and at the pn junction where active photo-generation and carrier transport occur are finely meshed, and the bulk region deep in the body of the solar cell, where the electrical activities are relatively steady and not as much space-dependant, are coarsely meshed to save computation time. Each type of the p- and n-type regions is then doped to a desired level. Second, the physical models relating to the operation of the solar cell and mathematical models and methods relating to numerical calculations are each specified. Third, the solutions are reached by iterative numerical calculations. Fourth, the simulation results or the outputs are accessed in texts, graphs or other pictorial forms.

    For simulation grid structures, a standard 2-dimensional back-lit grid structure in the Medici operational manual5) is used and then modified to fit the front-lit design. In this back-lit structure, the substrate is 150 μm thick and doped p-type in the concentration of 1 × 1014 cm-3. Laterally, only a 10 μm segment of the substrate is defined to conserve the simulation time. The n-type emitter on top is doped to the concentration of 1 × 1017 cm-3. The doping concentrations stated are close to typical values used in the solar cell fabrication. Other than the doping concentrations, the information on thermal processing conditions, that affect the pn junction formation, is not an input variable in Medici which is a device-level simulator. The location of the pn junction, between the emitter and the substrate, or the base, is 2 μm below the surface, in this case the back surface. The emitter is patterned as such it occupies about 7.5 μm of the 10 μm device width. The metal electrodes are also patterned as such they provide contacts to the n-type emitter and the p-type base separately. The front-lit structure is different in that the n-type emitter layer extends to the whole 10 μm laterally, the front electrode(cathode) is 1 μm and centered, and the back electrode(anode) covers the whole rear surface. The doping concentrations for the p-type and n-type regions are identical to those of the back-lit structure. The said grid structures had been used successfully and illustrated in earlier studies.6-8)

    In regards to physical model and parameter selection, Auger and concentration-dependent Shockley-Read-Hall recombination models and a concentration-dependent mobility model are chosen. The 2-carrier Newtonian iteration is chosen as the mathematical method in solving the governing differential and continuity equations by finite element analysis. The minority-carrier lifetime, the independent variable, is in the range of 5 × 10-10 s - 5 × 100 s or 0.5 ns - 5 s. When the electron recombination lifetime is varied, the hole recombination lifetime is fixed at 5 × 10−5 s and vice versa. Lastly, except for the parameters that are chosen, default values are used for all others.

    The photo-generation rate, electron-hole-pairs·cm-3·s−1, is an exponential function of distance y from the surface and can be expressed as

    G p h o t o n = F L U X exp [ y Y . C H A R ] 10 4 × Y . C H A R

    where FLUX is defined as the photon flux(photons·cm-2 ·s−1) and Y.CHAR is defined as the absorption distance (μm).5) The photon absorption is strongly frequencydependent. That is, higher the frequency, or shorter the wavelength, the stronger the photon absorption and therefore the shorter the absorption distance. For the present simulation experiments, the wavelength of 0.6 μm, the peak point in the AM1.5 spectrum having an absorption distance of 2 μm, is chosen for the incident photons. The photon flux, directed normal to the surface, is set at 4 × 1017 cm-2·sec−1. For these absorption distance and photon flux, the Eq. 2.1 can be rewritten as(2.2)

    G p h o t o n = 2 × 10 21 e y 2 μ m c m 3 sec 1

    Finally, after the simulation, the output is plotted in terms of the photovoltaic equation as expressed in(2.3)

    I = I o ( e q V k t 1 ) I s c

    From the I-V curve plotted, the open-circuit voltage, VOC, is extracted from where the curve intersects the xaxis, and the short-circuit current, ISC, is extracted from where the curve intersects the y-axis. The cell power as defined by the maximum power rectangle in a loaded circuit is then extracted.

    3.Results and Discussion

    The schematic illustration of the front-lit and back-lit solar cells as well as the movements of the minority carriers in them are illustrated in Fig. 1(a-b). As opposed to the front-lit structure in Fig. 1(a), where the light absorption, or electron-hole pair generation, takes place mostly near the pn junction, the light absorption takes place mostly near the rear surface of the p-type substrate, very far away from the pn junction, in the back-lit structure of Fig. 1(b). As such, electrons that are minority carriers in the p-type substrate have nearly the entire thickness of the substrate to travel from the generation sites to the n-type emitter side of the pn junction. To accomplish this feat, the electrons need to have recombination lifetime that is sufficiently long or else the substrate needs to be very thin. In comparison, the minoritycarrier recombination is not as much an issue in the front-lit design where the generation sites are not far from the pn junction.

    Quantitative results, in terms of short-circuit current(Isc), open-circuit voltage(Voc), and maximum power output (Pmax), are illustrated in Figs, 2, 3, and 4, respectively. In regards to the short-circuit current, Fig. 2 shows that a critical point, at about 5 × 10−4 s or 500 μs, exist for the back-lit, where the short-circuit current drops precipitously. Where the minority-carrier lifetime is longer than this critical value, in fact, the short-circuit current is larger in the back-lit than the front-lit by about 3 %, i.e., 6.4 × 10−9 A·μm−1 vs. 6.2 × 10−9 A·μm−1, which may be related to the shading loss in the front-lit. However, where the minority-carrier lifetime is shorter than the critical value, the short-circuit current in the back-lit drops to the level that is about 10-15 % below that in the front-lit, i.e., 5.4- 5.8 × 10−9 A·μm−1 vs. 6.2 × 10−9 A·μm−1. In an earlier study, this critical value of 500 μs was also confirmed, and the substrate thickness was found to have little to do with this critical value.8) Between the minority carriers, electron is generally more a limiting factor than hole, i.e., 5.4 × 10−9 A·μm−1 vs. 5.8 × 10−9 A·μm−1, unless the recombination lifetime is shorter than 50 ns at which the hole recombination in the emitter layer becomes the limiting factor.

    In regards to the open-circuit voltage, Fig. 3 shows that the back-lit design is consistently inferior to the front-lit design by about 15 %, i.e., 0.39 V vs. 0.45 V. It also shows that for both designs, the open-circuit voltage is not much affected by increase or decrease in minoritycarrier lifetime. This indicates that the main issue or factor is the location or arrangement of the cathode and anode electrodes. In the front-lit, where the two electrodes face each other, the anode fully covers the back surface of the p-type substrate. This full coverage on the high resistivity side tends to minimize the series resistance which leads to voltage drop. In the back-lit, on the other hand, the two-electrodes are positioned side by side, which causes the coverage by the anode to be relatively small, leading to a high series resistance and associated voltage drop.

    The maximum output powers arising from the given short-circuit currents and open-circuit voltages are plotted in Fig. 4. As it may be surmised from the above discussions, the output power is generally lower for the back-lit, mainly due to much smaller open-circuit voltages, except when the hole recombination lifetime is extremely short. Nonetheless, in the region where the minoritycarrier recombination lifetime is longer than 500 μs, the output power of the back-lit stays only about 10 % below that of the front-lit, i.e., 1.86 × 10−2 W·cm-2 vs. 2.07 × 10−2 W·cm-2 or 18.6 mW·cm-2 Vs. 20.7 mW·cm-2.

    At this point, it may be useful to relate briefly the minority-carrier recombination lifetime to material quality. That is, defects in the material tend to hinder the movement of a minority carrier and increase the chance that it is captured and recombines with a majority carrier. Of the known crystal growth methods, the FZ method, a contactless method, produces the highest quality Si crystals. Widely popular CZ method, where Si melts contact SiO2 crucible, produces good quality Si crystals that contain some defects associated with dissolved oxygen. Experimentally, the electron lifetime in p-type Si substrate is about 5 ms as grown and about 550 μs after oxidation for FZ type, 2.5 ms as grown and about 550 μs after oxidation for magnetic Czochralski(MCZ) type, and about 550 μs as grown and about 100 μs after oxidation for CZ type.9) Thus, for back-lit cells, the FZ and MCZ silicon falls safely within the critical lifetime limit of 500 μs, but the CZ silicon lies outside the limit.

    In regards to the substrate thickness, which is fixed at 150 μm in this study, an earlier work on the front-lit design showed that the substrate thickness and the minority carrier lifetime had a nearly linear inverse relationship at work,7) while an work on the back-lit design showed that the substrate thickness had minimal impact on the power output when the minority-carrier recombination lifetime is 500 μs or longer and that it impacted negatively only when the lifetime is shorter than 500 μs.8) The validity of these earlier woks and the present study needs to be tested experimentally, and such an experiment with known minority-carrier recombination lifetimes is left for the future study.


    Two prevailing Si solar cell structures, front-lit and back-lit, were studied and compared side by side by means of computer simulation. The front-lit suffers from shading loss associated with front metal electrodes, while the back-lit suffers from excessive minority-carrier (electron) recombination in the substrate. The simulation results on a p-type 150 μm thick Si substrate indicate that the backlit design, despite not having shading loss, is consistently inferior to the front-lit design by at least 10 % in the cell power output. Drop in the open-circuit voltage, due to series resistance associated with the electrode locations, is mainly attributed to cause the power loss. The shortcircuit current was not a deteriorating factor until the minority-carrier recombination lifetime fell below the critical limit of 500 μs. Between the minority carriers, electron is generally more a limiting factor than hole, unless the recombination lifetime is shorter than 50 ns at which the hole recombination in the n-type emitter layer of the front-lit becomes the limiting factor. Overall, the minority-carrier recombination lifetime in the back-lit needs to be at least an order of magnitude longer than that in the front-lit design, i.e., 500 μs vs. 50 μs, to achieve a near competitive result in terms of the maximum possible power output. This means that, to stay in competition, the back-lit has to go with FZ or MCZ silicon as the substrate material and may not opt for more economical CZ silicon.


    The simulation experiments and the rendering of the graphical work were assisted by undergraduate students, Messrs. Jun-Seok Kang, Min-Ho Lee, Wol-Su Lee, Won- Seop Lee, Myoung-Su Jang, Seong-Min Jang, and Seok- Won Jung of the Department of Electronic Materials Engineering of the University of Suwon. The author wishes to thank them for their diligent assistance. This work was supported by the research grant of the University of Suwon in 2016.



    Minority-carrier movements in the front-lit (a) and back-lit (b) structures: dark circles in the p-type substrate denote the minority electrons, and light circles in the n-type emitter denote the minority holes. Dark and light arrows indicate their respective movements.


    Short-circuit current(Isc) vs. hole recombination lifetime(τp) (a) and short-circuit current(Isc) vs. electron recombination lifetime (τn) (b).


    Open-circuit voltage(Voc) vs. hole recombination lifetime (τp) (a) and open-circuit voltage(Voc) vs. electron recombination lifetime(τn) (b).


    Maximum output power(Pmax) vs. hole recombination lifetime( τp) (a) and maximum output power(Pmax) vs. electron recombination lifetime(τn) (b).



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